CSI-2 (Camera Serial Interface 2)
๐ CSI-2 (Camera Serial Interface 2)
1) Concept
CSI-2 is a high-speed serial interface used to transfer image data from a camera sensor to a processor (MCU/SoC/ISP). The โ2โ indicates that it is the second-generation camera interface standard defined by the MIPI Alliance.
Image Sensor โ (CSI-2) โ SoC / ISP
CSI-2 is widely used in smartphones, drones, automotive cameras, and industrial vision systems.
2) Why CSI-2? (Compared to SPI / Parallel Interfaces)
| Interface | Characteristics | Drawbacks |
| Parallel (DVP, etc.) | Transfers multiple bits at once | Requires many pins, complex PCB routing |
| SPI / QSPI | Uses fewer pins | Bandwidth too low for high-resolution video |
| โ CSI-2 | High bandwidth with few pins | Requires PHY + protocol understanding |
CSI-2 allows high-resolution, high-FPS video transfer while keeping pin count low.
3) Signal Structure
CSI-2 is transported over MIPI D-PHY or C-PHY. The most common is D-PHY.
| Signal Lane | Purpose |
| Clock Lane (1 differential pair) | Timing reference for data transfer |
| Data Lanes (1โ4 differential pairs) | Carries image data |
Example physical wiring:
CLK+ CLK-
DATA0+ DATA0-
DATA1+ DATA1-
...
These are differential pairs, which provide:
High noise immunity
Stable operation at multi-Gbps speeds
4) Two Operating Modes (LP vs HS)
CSI-2 alternates between two signaling modes:
| Mode | Speed | Purpose |
| LP (Low-Power) Mode | Mbps-level | Sensor configuration & control |
| HS (High-Speed) Mode | Gbps-level | Actual frame data transmission |
Flow:
Configure camera โ LP mode
Start streaming โ HS mode
End frame โ back to LP mode
5) Data Format (Packet-Based Transmission)
CSI-2 does not transmit raw bit streams. It sends packets:
[Header] [Payload (pixel data)] [CRC/ECC]
This allows:
Data integrity checking
Lane alignment and frame reconstruction
6) Common Pixel Formats
| Format | Meaning |
| RAW10 | 10-bit per pixel raw sensor output |
| RAW12 | 12-bit per pixel raw data |
| YUV422 | Semi-processed color output |
| RGB888 | Fully expanded color data |
Most sensors output RAW10 / RAW12, which the ISP converts later.
7) What the Processor Must Handle (Important in Practice)
On the SoC side, the CSI-2 receiver and image pipeline must be configured:
Number of data lanes
Virtual channel selection
Pixel format configuration
Enable CSI-2 receiver hardware
Route frames to ISP or DMA โ Framebuffer / Memory
CSI-2 is not just wiring โ it requires:
CSI Receiver hardware block
Driver configuration
Image pipeline setup
8) Summary
CSI-2 is a high-speed serial camera interface using differential lanes.
It switches between low-power mode for configuration and high-speed mode for streaming.
Image data is transmitted as packets (RAW/YUV/RGB), which the SoC receives and processes through its CSI receiver and ISP pipeline.